OffsetNameTypeResetWidthDescription
0x000UARTDRRW0x---12/8Data Register, UARTDR
0x004UARTRSR/ UARTECRRW0x04/0Receive Status Register / Error Clear Register, UARTRSR/UARTECR
0x008-0x014----Reserved
0x018UARTFRRO0b-10010---9Flag Register, UARTFR
0x01C----Reserved
0x020UARTILPRRW0x008IrDA Low-Power Counter Register, UARTILPR
0x024UARTIBRDRW0x000016Integer Baud Rate Register, UARTIBRD
0x028UARTFBRDRW0x006Fractional Baud Rate Register, UARTFBRD
0x02CUARTLCR_HRW0x008Line Control Register, UARTLCR_H
0x030UARTCRRW0x030016Control Register, UARTCR
0x034UARTIFLSRW0x126Interrupt FIFO Level Select Register, UARTIFLS
0x038UARTIMSCRW0x00011Interrupt Mask Set/Clear Register, UARTIMSC
0x03CUARTRISRO0x00-11Raw Interrupt Status Register, UARTRIS
0x040UARTMISRO0x00-11Masked Interrupt Status Register, UARTMIS
0x044UARTICRWO-11Interrupt Clear Register, UARTICR
0x048UARTDMACRRW0x003DMA Control Register, UARTDMACR
0x04C-0x07C----Reserved
0x080-0x08C----Reserved for test purposes
0x090-0xFCC----Reserved
0xFD0-0xFDC----Reserved for future ID expansion
0xFE0UARTPeriphID0RO0x118UARTPeriphID0 Register
0xFE4UARTPeriphID1RO0x108UARTPeriphID1 Register
0xFE8UARTPeriphID2RO0x_4[1]8UARTPeriphID2 Register
0xFECUARTPeriphID3RO0x008UARTPeriphID3 Register
0xFF0UARTPCellID0RO0x0D8UARTPCellID0 Register
0xFF4UARTPCellID1RO0xF08UARTPCellID1 Register
0xFF8UARTPCellID2RO0x058UARTPCellID2 Register
0xFFCUARTPCellID3RO0xB18UARTPCellID3 Register

Reference

https://krinkinmu.github.io/2020/11/29/PL011.html

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