AArch64 Exception Vector Table

ARMv7 Exception Vector Table

OffsetVectorMode
0x00ResetSupervisor
0x04Undefined InstructionUndefined
0x08Supervisor CallSupervisor
0x0CPrefetch AbortAbort
0x10Data AbortAbort
0x14Not UsedNA
0x18IRQ InterruptIRQ
0x1CFIQ InterruptFIQ

ARMv8 Exception Vector Table

AddressException TypeDescription
VBAR_ELn +0x000SynchronousCurrent EL with SP0
+0x080IRQ/vIRQ^
+0x100FIQ/vFIQ^
+0x180SError/vSError^
+0x200SynchronousCurrent EL with SPx
+0x280IRQ/vIRQ^
+0x300FIQ/vFIQ^
+0x380SError/vSError^
+0x400SynchronousLower EL using AArch64
+0x480IRQ/vIRQ^
+0x500FIQ/vFIQ^
+0x580SError/vSError^
+0x600SynchronousLower EL using AArch32
+0x680IRQ/vIRQ^
+0x700FIQ/vFIQ^
+0x780SError/vSError^

Stack Pointer Selection

 MSR SPSel, #Imm1: Select whether to use the default SP_ELx Stack Pointer, or the SP_EL0 Stack Pointer

  • t: Indicates use of the SP_EL0 Stack Pointer.
  • h: Indicates use of the SP_ELx Stack Pointer.

SPSel

SPSel

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Reference

Registering Exception Vector Table

Exception Level Transition from EL2 to EL1

arch/aarch64/start.rs

mov x1, 0x80000000 // HCR_EL2::RW::EL1IsAarch64
msr HCR_EL2, x1

HCR_EL2

HCR_EL2

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Registration

arch/aarch64/exception/mod.rs

adrp x4 {vector_table}
add x4, x4, #:lo12:{vector_table}
msr VBAR_EL1, x4
isb sy
dsb sy
  • VBAR_EL1에 Vector Table에 해당하는 주소를 등록하여 Exception이 발생하였을 때에 Exception Vector Table을 참조하여 해당 동작을 실행할 수 있도록 하였다.

VBAR_EL1

VBAR_EL1

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