AArch64 Exception Vector Table
ARMv7 Exception Vector Table
| Offset | Vector | Mode |
|---|---|---|
| 0x00 | Reset | Supervisor |
| 0x04 | Undefined Instruction | Undefined |
| 0x08 | Supervisor Call | Supervisor |
| 0x0C | Prefetch Abort | Abort |
| 0x10 | Data Abort | Abort |
| 0x14 | Not Used | NA |
| 0x18 | IRQ Interrupt | IRQ |
| 0x1C | FIQ Interrupt | FIQ |
ARMv8 Exception Vector Table
| Address | Exception Type | Description |
|---|---|---|
| VBAR_ELn +0x000 | Synchronous | Current EL with SP0 |
| +0x080 | IRQ/vIRQ | ^ |
| +0x100 | FIQ/vFIQ | ^ |
| +0x180 | SError/vSError | ^ |
| +0x200 | Synchronous | Current EL with SPx |
| +0x280 | IRQ/vIRQ | ^ |
| +0x300 | FIQ/vFIQ | ^ |
| +0x380 | SError/vSError | ^ |
| +0x400 | Synchronous | Lower EL using AArch64 |
| +0x480 | IRQ/vIRQ | ^ |
| +0x500 | FIQ/vFIQ | ^ |
| +0x580 | SError/vSError | ^ |
| +0x600 | Synchronous | Lower EL using AArch32 |
| +0x680 | IRQ/vIRQ | ^ |
| +0x700 | FIQ/vFIQ | ^ |
| +0x780 | SError/vSError | ^ |
Stack Pointer Selection
MSR SPSel, #Imm1: Select whether to use the default SP_ELx Stack Pointer, or the SP_EL0 Stack Pointer
- t: Indicates use of the SP_EL0 Stack Pointer.
- h: Indicates use of the SP_ELx Stack Pointer.
SPSel
SPSel
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- Purpose: Allows the Stack Pointer to be selected between SP_EL0 and SP_ELx.
- Reference: https://developer.arm.com/documentation/ddi0601/2023-12/AArch64-Registers/SPSel—Stack-Pointer-Select
Reference
- Stack Pointer Selection: https://developer.arm.com/documentation/ddi0500/j/CHDDGJID
Registering Exception Vector Table
Exception Level Transition from EL2 to EL1
arch/aarch64/start.rs
mov x1, 0x80000000 // HCR_EL2::RW::EL1IsAarch64
msr HCR_EL2, x1HCR_EL2
HCR_EL2
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- Purpose: Provides configuration controls for virtualization, including defining whether various operations are trapped to EL2.
- Reference: https://developer.arm.com/documentation/ddi0601/2024-03/AArch64-Registers/HCR-EL2—Hypervisor-Configuration-Register
Registration
arch/aarch64/exception/mod.rs
adrp x4 {vector_table}
add x4, x4, #:lo12:{vector_table}
msr VBAR_EL1, x4
isb sy
dsb syVBAR_EL1에 Vector Table에 해당하는 주소를 등록하여 Exception이 발생하였을 때에 Exception Vector Table을 참조하여 해당 동작을 실행할 수 있도록 하였다.
VBAR_EL1
VBAR_EL1
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- Purpose: Holds the vector base address for any exception that is taken to EL1.
- Reference: https://developer.arm.com/documentation/ddi0601/2024-03/AArch64-Registers/VBAR-EL1—Vector-Base-Address-Register—EL1-?lang=en